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 The internationally recognized IEEE 35th Asian Test Symposium (ATS 2026) is now accepting original research paper submissions from academicians, researchers, industry experts, and Ph.D. scholars worldwide. Organized as one of the premier conferences in the field of electronic testing and reliability, ATS 2026 offers a global platform to present innovative research in semiconductor testing, AI-driven testing systems, hardware security, and advanced integrated circuit technologies.

For complete conference details, submission portals, and registration updates, visit ATS 2026 Official Website

What is ATS 2026?

The IEEE 35th Asian Test Symposium (ATS 2026) is a flagship international symposium focused on testing methodologies, fault diagnosis, reliability analysis, and emerging test technologies in modern electronic systems.

The conference brings together:

  • Researchers from universities and R&D labs
  • Semiconductor industry professionals
  • VLSI and hardware testing engineers
  • AI and machine learning researchers
  • Ph.D. scholars and postgraduate students

ATS 2026 provides opportunities for:

  • Publishing high-quality IEEE-indexed papers
  • Presenting cutting-edge research
  • Networking with global experts
  • Exploring future semiconductor test technologies

Accepted papers will be submitted for inclusion in IEEE Xplore Digital Library.

ATS 2026 Conference Themes and Research Topics

ATS 2026 invites submissions covering all aspects of system, module, and device testing technologies.

Major Topics Include

  • AI Test and Test for AI
  • Analog and Mixed-Signal Testing
  • Automatic Test Pattern Generation (ATPG)
  • Built-In Self-Test (BIST)
  • Design for Testability (DFT)
  • Fault Diagnosis and Failure Analysis
  • Machine Learning in Test Automation
  • Memory Test, Diagnosis, and Repair
  • Hardware Security and Trust
  • SiP, Chiplet, 2.5D and 3D IC Testing
  • Yield Analysis and Enhancement
  • Semiconductor Reliability
  • Advanced VLSI Testing Techniques

Researchers working in:

  • Artificial Intelligence
  • Semiconductor Engineering
  • Embedded Systems
  • VLSI Design
  • Electronic Testing
  • Cybersecurity Hardware
  • Chiplet Architectures

are strongly encouraged to submit their work.

For the complete technical tracks and submission categories, visit ATS 2026 CFP Details

ATS 2026 Paper Submission Guidelines

Authors planning to submit papers to ATS 2026 must follow the official IEEE conference formatting requirements.

Manuscript Requirements

  • Papers must be submitted electronically in PDF format
  • Maximum length: 6 pages
  • IEEE standard 2-column format mandatory
  • Figures, tables, abstract, and references must be included within the page limit
  • Only original and unpublished work is accepted

Publication Information

Accepted papers will:

  • Be presented at the conference
  • Be considered for publication in IEEE Xplore
  • Gain visibility among international researchers and industry professionals

Important Note

At least one author of every accepted paper must:

  • Register at the full conference rate
  • Attend the conference
  • Present the paper 

ATS 2026 Important Dates

EventDate
Paper Submission DeadlineJune 6, 2026
Acceptance NotificationSeptember 14, 2026
Camera-Ready SubmissionOctober 13, 2026

Researchers are advised to begin manuscript preparation early due to the competitive review process.

Why Researchers Should Submit to ATS 2026

Global IEEE Recognition

ATS is recognized internationally as a high-impact symposium in electronics testing and reliability engineering.

IEEE Xplore Publication

Accepted papers gain international indexing and citation visibility through IEEE publication channels.

Industry and Academic Collaboration

The conference attracts experts from:

  • Semiconductor companies
  • Testing laboratories
  • Research institutions
  • Universities worldwide

Emerging AI and Hardware Research Focus

ATS 2026 strongly emphasizes:

  • AI-based testing
  • Machine learning applications in testing
  • Hardware security
  • Advanced packaging technologies
  • Chiplet and 3D IC validation

This makes the symposium highly relevant for current-generation semiconductor and AI hardware research.

Venue: Kaohsiung, Taiwan

ATS 2026 will be hosted in the vibrant technology-oriented city of Kaohsiung, offering attendees opportunities for:

  • International networking
  • Industry collaboration
  • Research exposure
  • Cultural experience

How to Submit Your Paper to ATS 2026

Authors can access:

  • Submission portal
  • Formatting templates
  • Registration details
  • Conference announcements

through the official conference website:

Submit Paper to ATS 2026

ATS 2026 Organizing Committee Contact

Conference Contact Person

Mr. Yung-Ming Chiu

Official Email

pobsadue@poetry-life.com

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